Stepping into the exhibition halls of WAIC 2026, what is the most intuitive impression? The answer is: grand scale. This does not refer to the size of the venue itself, but the bulky computing server units visible across many core exhibition areas — there are even entire "computing power walls" on display.

From Huawei's Ascend 950 Super Node and Alibaba T-Head's Zhenwu M890 and Panjiu AL128, to Kunlunxin's P800 and Tianchi Super Node, as well as computing systems presented by companies including MetaX, Qingwei Intelligent, Iluvatar Corex and Moore Threads, Leitech (ID: leitech) has observed that nearly all of the most eye-catching semiconductor products at this year's WAIC are no longer showcased as single standalone chips.

Image source: Leitech

Frankly, this marks the first time domestic chip manufacturers have showcased their full industrial chain ecosystems in such a concentrated manner. Yet despite their differing chips and architectures, after a thorough tour of the venue, Xiao Lei found that all chip makers at this WAIC share the exact same core keyword: "super node".

What exactly is a "super node"? You can think of it as an upgraded version of a multi-card cluster. Traditional computing power clusters simply group computing cards together, trading performance for larger computing scale. Super nodes, by contrast, build on this foundation with self-developed hardware and architectures, interconnecting computing cards into massive computing clusters while minimizing performance loss as much as possible.

As demand for AI computing power continues to surge and AI enterprises become increasingly sensitive to computing costs, super nodes are regarded as the core competitiveness of computing power companies. That is why promotions for "super nodes" are virtually everywhere at WAIC.

Giants unveil their strengths collectively, domestic super nodes enter explosive growth phase

Leitech first visited the Alibaba exhibition area. As a dual leader in China's cloud services and chip sectors, Alibaba displayed a computing system comprising the Zhenwu M890 chip and the Panjiu AL128 super node. It stands as one of the most attention-grabbing exhibits, even hailed as the "star highlight" of this WAIC.

As Alibaba's self-developed flagship computing chip, the Zhenwu M890 has also drawn considerable attention. Built on T-Head's proprietary parallel computing architecture, it integrates 144GB of high-bandwidth memory and delivers an inter-chip interconnection bandwidth of 800GB/s. Natively supporting a full range of data precisions from FP32 to FP4, it achieves three times the overall performance of the previous-generation Zhenwu 810E, and can handle large model training, inference, and concurrent AI agent tasks simultaneously.

Image source: Alibaba

Judging by its specifications alone, the Zhenwu M890 is indeed a highly capable training-inference integrated chip. However, after touring Alibaba's exhibition area, Xiao Lei found that its real core strength lies not in performance gains, but in the fact that Alibaba has finally closed the loop of its entire computing power ecosystem with this chip.

The Panjiu AL128, displayed alongside the Zhenwu M890, is not only equipped with T-Head's self-developed ICN Switch 1.0 interconnection chip, but nearly all other key chips and hardware components are also independently developed by Alibaba. This is the critical factor that enables 128 computing chips to form a single "supercomputer" at the system level. The combination of the two has significantly reduced Alibaba's computing power costs compared with previous setups.

For Alibaba, which already commands the Qwen large model ecosystem and cloud server platform, the launch of the Zhenwu M890 and Panjiu AL128 means it has finally completed the full end-to-end chain of "chip – server – cloud platform – large model – AI agent applications", bringing every single link under its own control.

Over at Baidu's exhibition area, the company showcased the Tianchi computing matrix built around the Kunlunxin P800 chip, supporting super node connections of up to 256 cards. Compared with the previous generation of computing clusters, it delivers notable improvements in mid-range throughput performance, inference efficiency and communication latency. It is compatible with mainstream models including Ernie, DeepSeek, Zhipu AI and MiniMax, and can be further scaled up to ultra-large clusters with hundreds of thousands of cards.

Image source: Baidu

Like Alibaba, Baidu counts its Kunlunxin chips and Tianchi platform as key pillars in building its complete AI value chain. Leveraging the cost advantages of its 10,000-card Tianchi cluster, Baidu can roll out applications across various sectors at lower costs — a critical factor behind its breakthroughs in search, text-to-image generation, intelligent driving, AI agents and other business lines.

In Leitech's view, this internally demand-driven AI ecosystem is a key advantage for domestic AI players like Alibaba and Baidu. Supported by lower computing power costs, they have more room for trial and error, enabling China to outpace other countries in AI implementation and deployment.

At Huawei's Ascend exhibition hall in Hall H2, Leitech also encountered the most impressive product of this WAIC: the Ascend 950 Super Node. Composed of 1,024 computing cards, it features 256TB of unified memory and an NPU round-trip latency of nearly 3 microseconds. Paired with a unified memory addressing system, it can operate and perform computations like a single "integrated" computer.

Unlike the partial displays from other manufacturers, Huawei has brought its full-scale server system to the booth — so massive that it looks like a solid wall from the front. Behind that "wall" lies China's most powerful computing matrix to date. Notably, the 1,024-card cluster is only the upper limit of this on-site demonstration. The Ascend 950 Super Node can support interconnection of up to 8,192 chips, with a maximum scalable cluster size exceeding 500,000 cards.

Image source: LeiTech

The Ascend 950 Super Node is Huawei's biggest asset in the AI sector. Even if individual chips still lag behind international flagship GPUs, the effective computing power ultimately delivered to customers remains highly competitive, as long as overall utilization is improved through high-speed interconnection and system-level coordination.

After touring the exhibition areas of the three domestic computing power giants, Leitech found that all of them are betting on 100,000-card-scale computing matrices. Most adopt self-developed chips and interconnection architectures to minimize hardware and maintenance costs, which are then translated into advantages in computing power pricing.

In fact, this represents a shared trend for domestic computing chips. Previously, the focus was on whether domestic chips could be developed at all. Now that self-developed chips have almost become standard, competition has shifted to whether they can deliver stable, low-cost computing power.

Beyond ultra-large clusters: these domestic players deserve attention

At MetaX's booth, Leitech also saw its newly released Xijing S600 Super Node. A full set of massive server equipment placed at the center of the booth delivers quite a strong visual impact. Yet beyond the initial impression, what deserves more attention lies deep inside the cabinet — the OEX orthogonal architecture.

MetaX's Xijing S series achieves high-speed interconnection of 64 computing cards in a single cabinet via orthogonal connectors and a two-stage switching topology, and can be scaled up to 10,000-card clusters through horizontal stacking. Simply put, instead of relying on numerous high-speed cables, computing nodes and switching nodes are directly interconnected through an orthogonal structure.

Image source: LeiTech

This forms a triple zero design: zero cables for compute nodes, zero cables for switching nodes, and zero cables between nodes. It directly addresses pain points of large-scale clusters such as complicated cabling, signal attenuation and rising failure rates. In fact, most malfunctions in large data centers stem not from computing chips themselves, but from various connecting hardware and auxiliary chips malfunctioning under high-frequency operation.

MetaX’s solution eliminates cables to the greatest extent and adopts a disaggregated modular architecture. All core modules support independent deployment and maintenance, substantially cutting maintenance time and costs for data centers. Featuring lower operation expenses and a more open-source ecosystem, MetaX’s solution proves highly appealing to small and medium-sized enterprises that intend to deploy private computing servers.

Over at Qingwei Intelligent’s booth, the firm showcased its next-gen TX82 chip prototype, Reconfigurable 3.0 technology and 4K super node system. The most distinctive merit of this system is that it does not rely on a fixed hardware architecture to accommodate all models. Instead, it dynamically allocates computing resources according to diverse algorithms, lowering idle rates of hardware units.

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The exhibited 4K super node supports expansion up to 4,096 chips, and its matching software stack is compatible with more than 200 models. Compared with the ultra-large clusters rolled out by major tech giants, Qingwei Intelligent gains an edge via in-depth customization tailored to corporate demands, helping businesses further cut deployment and computing costs.

Another domestic chip developer, Moore Threads, centered its WAIC exhibition on how to translate computing power into sustainably produced tokens.

At Moore Threads’ booth, Leitech witnessed a full computing system built around the theme "Token Era, Ubiquitous Intelligence". Moore Threads frames this ecosystem as three "AI Factories": the Model Training Factory, Token Production Factory, and Agent Development Factory. Put simply, the workflow involves training models first, continuously generating tokens at reduced costs, and ultimately embedding model and token capabilities into task-executable intelligent agents.

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To verify that domestic GPUs are capable of running existing models, Moore Threads also presented training results achieved with its fully functional MTT S5000 GPU and the MUSA software stack. The MoE-236B base model completed end-to-end training from scratch, and the EvoPhys-World 5D world model developed by the EvoPhys team at Peking University also underwent native training on this domestic hardware and software suite.

In Leitech’s opinion, Moore Threads’ philosophy aligns closely with the core trend of this year’s WAIC. Going forward, evaluating an AI chip enterprise will no longer hinge solely on the peak computing performance of a single GPU. Instead, assessment will focus on its capacity to conduct large model training, stably generate tokens, and ultimately support AI agents for real-world industrial deployment.

The three AI Factories showcased by Moore Threads essentially mark a shift for domestic computing power providers, moving from selling chips to delivering tangible productivity.

Beyond high-performance cloud computing, numerous edge-side solutions pairing Arm CPUs with NPUs and AI coprocessors were showcased at WAIC. For instance, D-Robotics’ RDK S600 features an 18-core Arm Cortex-A78AE processor, delivering a maximum edge inference performance of 560 TOPS. Rockchip exhibited a dual-chip solution combining RK3588 and RK3576 main controllers with the RK1828 AI coprocessor, designed for local operation of lightweight large models.

These Arm-based chips are not intended to replace Ascend or Kunlun chips. Instead, they function as local "brains" for AI terminals such as robots and vehicles. Low-computing tasks requiring instant responses run locally, while only complex workloads are offloaded to the cloud.

This represents the optimal blueprint for the future AI ecosystem. Cloud-based super nodes handle complex training and high-intensity inference, while Arm edge chips take charge of real-time perception, private data processing and low-latency decision-making. The integrated edge-cloud architecture boasts far greater merits than an exclusively cloud-only or fully local setup.

The Second Half of AI Competition: Performance Is No Longer the Sole Contest

Whether it is super nodes or customized cluster solutions, it is easy to find that their core lies in cutting computing costs rather than pursuing ultimate AI performance. Why have companies stopped emphasizing performance? In truth, they have not abandoned performance entirely. Instead, cost and efficiency have become more critical priorities.

The AI industry has long moved past the era of competing purely on model performance. As demand surges for the commercial rollout of AI Agent applications, cost has turned into the top metric drawing attention from all enterprises.

Furthermore, the widespread adoption of AI Agents will only make businesses more cost-sensitive regarding computing resources. Even a tiny cost reduction of a few cents per million tokens translates into massive gains when scaled to hundreds of millions of users. Meanwhile, lower computing costs accelerate AI implementation, which in turn drives further expansion of computing clusters.

Image source: LeiTech

This positive feedback loop is exactly what chip companies are eager to witness.

After exploring the computing power and chip exhibition zones at WAIC, Leitech noticed a striking shift in the focus of competition among domestic computing players. Last year, manufacturers prioritized peak performance and maximum computing capacity of individual chips. This year, while chip performance remains relevant, boosting hardware utilization and cutting token costs have risen to become more central priorities.

Further visits to booths showcasing AI agents, robots and AI terminal devices helped Leitech pinpoint the root cause of this shift. AI agents are transforming AI from an occasional-use tool into continuously functioning intelligent partners. Unlike conventional application scenarios, agents call models repeatedly, independently schedule tasks and verify outputs, resulting in exponentially higher token consumption.

Accordingly, even the most sophisticated agents can hardly achieve widespread adoption without affordable, reliable computing power. This explains why super nodes, 10,000-card clusters and edge-cloud collaboration collectively took center stage at this WAIC. These technologies address more than just whether computing resources are sufficient; their core goal is to enable computing cards to generate tokens with far higher efficiency.

From this perspective, WAIC 2026 showcases more than just faster domestic chips. It presents an emerging full-stack Chinese AI computing ecosystem. Cloud-based super nodes handle complex training and heavy-duty inference; edge and end-side chips manage real-time perception and low-latency decision-making; models, platforms and applications collectively consume these computing resources.

This ecosystem holds the key to breakthrough development for China’s AI industry in the years ahead.

The WAIC 2026, themed “Intelligent Partners, Co-Creating the Future,” is underway!

The AI narrative is shifting—from stacking model parameters to deploying agent-driven productivity; heterogeneous computing and photonic computing continue pushing the boundaries of computational limits; embodied intelligence accelerates real-world applications, bringing physical AI to homes and factories.

The LeiTech WAIC reporting team has arrived in Shanghai to cover the annual pinnacle of AI industrialization—stay tuned!